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2N5564/5565/5566 Matched N-Channel JFET Pairs Product Summary Part Number 2N5564 2N5565 2N5566 VGS(off) (V) -0.5 to -3 -0.5 to -3 -0.5 to -3 V(BR)GSS Min (V) -40 -40 -40 gfs Min (mS) 7.5 7.5 7.5 IG Typ (pA) -3 -3 -3 jVGS1 - VGS2j Max (mV) 5 10 20 Features D D D D D D D Two-Chip Design High Slew Rate Low Offset/Drift Voltage Low Gate Leakage: 3 pA Low Noise: 12 nVHz @ 10 Hz Good CMRR: 76 dB Minimum Parasitics Benefits D D D D D D D Tight Differential Match vs. Current Improved Op Amp Speed, Settling Time Accuracy Minimum Input Error/Trimming Requirement Insignificant Signal Loss/Error Voltage High System Sensitivity Minimum Error with Large Input Signals Maximum High Frequency Performance Applications D Wideband Differential Amps D High-Speed, Temp-Compensated, Single-Ended Input Amps D High-Speed Comparators D Impedance Converters D Matched Switches Description The 2N5564/5565/5566 are matched pairs of JFETs mounted in a TO-71 package. This two-chip design reduces parasitics for good performance at high frequency while ensuring extremely tight matching. This series features high breakdown voltage (V(BR)DSS typically > 55 V), high gain (typically > 9 mS), and <5-mV offset between the two die. The hermetically-sealed TO-71 package is available with full military processing (see Military Information). For similar products see the low-noise U/SST401 series, and the low-leakage 2N5196/5197/5198/5199 data sheets. TO-71 S1 1 D1 2 3 G1 Top View 4 S2 6 5 D2 G2 Absolute Maximum Ratings Gate-Drain, Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . -40 V Gate-Gate Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . "80 V Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Lead Temperature (1/16" from case for 10 sec.) . . . . . . . . . . . . 300 _C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to 200_C Operating Junction Temperature . . . . . . . . . . . . . . . . . . -55 to 150_C Power Dissipation : Per Sidea . . . . . . . . . . . . . . . . . 325 mW Totalb . . . . . . . . . . . . . . . . . . . . 650 mW Notes a. Derate 2.6 mW/_C above 25_C b. Derate 5.2 mW/_C above 25_C Updates to this data sheet may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600. Please request FaxBack document #70254. Siliconix P-37406--Rev. C, 25-Jul-94 1 2N5564/5565/5566 Specificationsa Limits 2N5564 2N5565 2N5566 Parameter Static Gate-Source Breakdown Voltage Gate-Source Cutoff Voltage Saturation Drain Currentc Gate Reverse Current Gate Operating Currentd Drain-Source On-Resistance Gate-Source Voltaged Gate-Source Forward Voltage Symbol Test Conditions Typb Min Max Min Max Min Max Unit V(BR)GSS VGS(off) IDSS IGSS IG rDS(on) VGS VGS(F) IG = -1 mA, VDS = 0 V VDS = 15 V, ID = 1 nA VDS = 15 V, VGS = 0 V VGS = -20 V, VDS = 0 V TA = 150_C VDG = 15 V, ID = 2 mA TA = 125_C VGS = 0 V, ID = 1 mA VDG = 15 V, ID = 2 mA IG = 2 mA , VDS = 0 V -55 -2 20 -5 -10 -3 -1 50 -1.2 0.7 -40 -0.5 5 -3 30 -100 -200 -40 -0.5 5 -3 30 -100 -200 -40 V -0.5 5 -3 30 -100 -200 mA pA nA pA nA 100 100 100 W 1 1 1 V Dynamic Common-Source Forward Transconductance Common-Source Output Conductance Common-Source Forward Transconductance Common-Source Input Capacitance Common-Source Reverse Transfer Capacitance Equivalent Input Noise Voltage Noise Figure gfs gos gfs Ciss VDS = 15 V ID = 2 mA V, f = 1 MHz Crss en NF VDS = 15 V, ID = 2 mA f = 10 Hz RG = 10 MW 2.5 3 3 3 nV Hz dB VDS = 15 V, ID = 2 mA S f = 1 kHz VDS = 15 V, ID = 2 mA f = 100 MHz 9 35 8.5 10 7 12 7.5 12.5 45 7 12 7.5 12.5 45 7 12 pF 7.5 12.5 45 mS mS mS 12 50 1 50 1 50 1 Matching Differential Gate-Source Voltage Gate-Source Voltage Differential Change with Temperature Saturation Drain Current Ratiod Transconductance Ratio Common Mode Rejection Ratiod |V GS1-V GS2| D|V GS1-V GS2| DT VDG = 15 V, ID = 2 mA VDG = 15 V, ID = 2 mA TA = -55 to 125_C VDS = 15 V, VGS = 0 V VDS = 15 V, ID = 2 mA f = 1 kHz VDG = 10 to 20 V ID = 2 mA 0.98 0.95 5 10 10 25 20 50 mV mV/ _C I DSS1 I DSS2 gfs1 gfs2 CMRR 1 0.95 0.90 1 0.95 0.90 1 0.98 76 0.95 1 1 1 dB NCBD Notes a. TA = 25_C unless otherwise noted. b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. c. Pulse test: PW v300 ms duty cycle v3%. d. This parameter not registered with JEDEC. 2 Siliconix P-37406--Rev. C, 25-Jul-94 2N5564/5565/5566 Typical Characteristics 100 rDS(on) - Drain-Source On-Resistance ( W ) On-Resistance and Drain Current vs. Gate-Source Cutoff Voltage rDS @ ID = 1 mA, VGS = 0 IDSS @ VDS = 15 V, VGS = 0 200 rDS(on) - Drain-Source On-Resistance ( W ) I DSS - Saturation Drain Current (mA) 100 On-Resistance vs. Drain Current TA = 25_C 80 IDSS 160 80 VGS(off) = -2 V 60 rDS 120 60 40 80 40 20 40 20 0 0 -2 -4 -6 -8 -10 VGS(off) - Gate-Source Cutoff Voltage (V) 0 0 1 10 ID - Drain Current (mA) 5 100 On-Resistance vs. Temperature 200 rDS(on) - Drain-Source On-Resistance ( W ) ID = 1 mA rDS changes Y 0.7%/_C 160 Switching Time (ns) Turn-On Switching tr approximately independent of ID VDG = 5 V, RG = 50 W VGSL = -10 V tr 4 120 VGS(off) = -2 V 80 3 td(on) @ ID = 12 mA 2 40 1 td(on) @ ID = 3 mA 0 -2 -4 -6 -8 -10 0 -55 -35 -15 5 25 45 65 85 105 125 TA - Temperature (_C) 0 VGS(off) - Gate-Source Cutoff Voltage (V) 50 g fs - Forward Transconductance (mS) Forward Transconductance and Output Conductance vs. Gate-Source Cutoff Voltage 500 gfs and gos @ VDS = 15 V VGS = 0 V, f = 1 kHz 30 Turn-Off Switching td(off) independent of device VGS(off) VDG = 5 V, VGSL = -10 V 40 gfs gos 400 g os - Output Conductance ( mS) Switching Time (ns) 24 tf 18 VGS(off) = -2 V 12 td(off) 6 30 200 20 200 10 100 0 0 -2 -4 -6 -8 -10 VGS(off) - Gate-Source Cutoff Voltage (V) 0 0 0 2 4 6 8 10 ID - Drain Current (mA) Siliconix P-37406--Rev. C, 25-Jul-94 3 2N5564/5565/5566 Typical Characteristics (Cont'd) 14 12 I D - Drain Current (mA) 10 8 -0.3 V 6 4 2 -0.7 V 0 0 4 8 12 16 20 VDS - Drain-Source Voltage (V) 0 0 -0.4 -0.8 -1.2 -1.6 VGS - Gate-Source Voltage (V) -2 -0.4 V -0.5 V -0.6 V Output Characteristics VGS(off) = -1.5 V VGS = 0 V 40 Transfer Characteristics VGS(off) = -2 V VDS = 15 V 32 I D - Drain Current (mA) -0.1 V -0.2 V 24 25_C 16 TA = -55_C 8 125_C 5 -0.1 V 4 I D - Drain Current (mA) Output Characteristics VGS = 0 V VGS(off) = -1.5 V -0.2 V -0.3 V -0.4 V Capacitance (pF) 30 Capacitance vs. Gate-Source Voltage f = 1 MHz VDS = 0 V 24 3 -0.5 V 2 -0.6 V -0.7 V 1 -0.8 V -0.9 V 0 0.2 0.4 0.6 0.8 1 18 12 Ciss 6 Crss 0 VDS - Drain-Source Voltage (V) 0 0 -4 -8 -12 -16 -20 VGS - Gate-Source Voltage (V) 10 nA Gate Leakage Current IGSS @ 25_C TA = 125_C ID = 10 mA 100 Common-Gate Input Admittance VDG = 15 V ID = 10 mA TA = 25_C 10 (mS) 1 mA 1 nA I G - Gate Leakage gig big 1 mA 100 pA 10 pA TA = 25_C 1 pA 10 mA IGSS @ 25_C 1 IG(on) @ ID 0.1 pA 0 6 12 18 24 30 VDG - Drain-Gate Voltage (V) 0.1 100 200 500 1000 f - Frequency (MHz) 4 Siliconix P-37406--Rev. C, 25-Jul-94 2N5564/5565/5566 Typical Characteristics (Cont'd) Common-Gate Forward Admittance 100 VDG = 15 V ID = 10 mA TA = 25_C -gfg 10 (mS) (mS) gfg bfg 1 10 VDG = 15 V ID = 10 mA TA = 25_C -brg Common-Gate Reverse Admittance -grg 0.1 +grg 1 0.1 100 200 500 1000 f - Frequency (MHz) 0.01 100 200 500 1000 f - Frequency (MHz) Common-Gate Output Admittance 100 VDG = 15 V ID = 10 mA TA = 25_C bog 10 (mS) gog 100 Noise Voltage vs. Frequency VDS = 15 V e n - Noise Voltage (nV / Hz) 10 ID = 1 mA 1 ID = 10 mA 0.1 100 200 500 1000 f - Frequency (MHz) 1 10 100 1k f - Frequency (Hz) 10 k 100 k 1000 Output Conductance vs. Drain Current VGS(off) = -2 V g fs - Forward Transconductance (mS) VDS = 15 V f = 1 kHz 100 Transconductance vs. Drain Current VGS(off) = -2 V VDS = 15 V f = 1 kHz g os - Output Conductance ( mS) TA = -55_C 25_C 10 125_C TA = -55_C 100 25_C 125_C 10 0.1 1.0 ID - Drain Current (mA) 10 1 0.1 1.0 ID - Drain Current (mA) 10 Siliconix P-37406--Rev. C, 25-Jul-94 5 |
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